The present invention relates to a semiconductor device and a method of forming the semiconductor device, and more particularly, to a semiconductor device capable of substantially preventing the generation of a void when forming a buried gate electrode.
Among semiconductor memory devices, a dynamic random access memory (DRAM) includes a plurality of unit cells each of which consists of a capacitor and a transistor. Here, the capacitor is used to temporarily store data, and the transistor is used to transmit data between a bit line and the capacitor in response to a control signal supplied through a word line. The transistor consists of three regions which are a gate, a source and a drain. Electric charges move between the source and the drain according to the control signal inputted to the gate. The flow of electric charges between the source and the drain is performed through a channel region, and the channel uses a characteristic of the semiconductor.
When a general transistor is formed on a semiconductor substrate, a source and a drain thereof are formed by forming a gate on the semiconductor substrate and doping impurities in portions of the semiconductor substrate that are at both sides of the gate. In such a case, a region between the source and the drain under the gate becomes a channel region of the transistor. The transistor having such a horizontal channel region occupies a specific area of the semiconductor substrate. In the case of a complicated semiconductor memory device, it is difficult to reduce the entire area because the memory device includes a plurality of transistors.
If the entire area of the semiconductor memory device is reduced, the number of semiconductor memory devices formed in one wafer can be increased, resulting in improving productivity. Several methods have been suggested in order to reduce the entire area of the semiconductor memory device. One method is to use a recess gate where a channel region is formed along a curved surface of a recess formed in a substrate, instead of the existing planar gate having a horizontal channel region. Another method is to use a buried gate which is buried in a recess.